| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2024-03-19 | Update .gitignore | Steven Noreyko | |
| 2024-02-23 | create opensource front/back panels | Steven Noreyko | |
| 2024-01-08 | add new test points to main board and jig | Steven Noreyko | |
| 2023-10-27 | midi+jacks fixes | Steven Noreyko | |
| Moved 5V pogo pin pad de-plated encoder jack lug for less assembly errors | |||
| 2023-10-07 | production adjustments and convert testjig to kicad7 | Steven Noreyko | |
| 2023-10-05 | create variation with USB-C and SMD audio jacks | Steven Noreyko | |
| 2023-10-04 | bigholes version with led part numbers | Steven Noreyko | |
| 2023-10-04 | text cleanup, add license text to pcb | Steven Noreyko | |
| 2023-08-02 | update STM chip LCSC part number | Steven Noreyko | |
| 2023-07-25 | fix build process to use binmaker.py that calls uf2conv and also commit a ↵ | Alex Evans | |
| built version... | |||
| 2023-07-25 | more build docs | Alex Evans | |
| 2023-07-01 | Initial Clean Up Run | Stijn Kuipers | |
| - change many passives to 0402 - change TL072's to the same SOIC package - finish up routing for topside input buffer - add diodes for +- 12 from eurorack input (untested) - change some board limits to represent current manufacturing reality - hunt down a lot of DRC errors (lots of warnings remaining!) - made hole for expander bigger - fixedsys fonts + text label moving about - todo: reset labels for 0402 parts since my standard library has the labels taken off. | |||
| 2023-06-29 | add jlc bom and pos files | Alex Evans | |
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index : plinky | |
| Plinky |
| summaryrefslogtreecommitdiff |
path: root/.gitignore