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authorjacqueline <me@jacqueline.id.au>2025-07-25 13:33:07 +1000
committerjacqueline <me@jacqueline.id.au>2025-07-25 13:33:07 +1000
commitc8e79a926620e48830778714cfe4b2ea2453fcaf (patch)
tree8c756e08e01b8e147cf72bec128026f46bd854c5 /lib/bt/controller/esp32c2
parent237136f3e93cb6b5be24670d7520adb17cc0fa36 (diff)
downloadtangara-fw-c8e79a926620e48830778714cfe4b2ea2453fcaf.tar.gz
Update forked idf components
Diffstat (limited to 'lib/bt/controller/esp32c2')
-rw-r--r--lib/bt/controller/esp32c2/Kconfig.in372
-rw-r--r--lib/bt/controller/esp32c2/ble.c71
-rw-r--r--lib/bt/controller/esp32c2/ble_priv.h13
-rw-r--r--lib/bt/controller/esp32c2/bt.c715
-rw-r--r--lib/bt/controller/esp32c2/dummy.c320
-rw-r--r--lib/bt/controller/esp32c2/esp_bt_cfg.h112
6 files changed, 1259 insertions, 344 deletions
diff --git a/lib/bt/controller/esp32c2/Kconfig.in b/lib/bt/controller/esp32c2/Kconfig.in
index 9a04ae63..c720fcb8 100644
--- a/lib/bt/controller/esp32c2/Kconfig.in
+++ b/lib/bt/controller/esp32c2/Kconfig.in
@@ -2,15 +2,15 @@
menu "HCI Config"
choice BT_LE_HCI_INTERFACE
- prompt "Select HCI interface"
+ prompt "HCI mode"
default BT_LE_HCI_INTERFACE_USE_RAM
config BT_LE_HCI_INTERFACE_USE_RAM
- bool "ram"
+ bool "VHCI"
help
Use RAM as HCI interface
config BT_LE_HCI_INTERFACE_USE_UART
- bool "uart"
+ bool "UART(H4)"
help
Use UART as HCI interface
endchoice
@@ -73,12 +73,26 @@ menu "HCI Config"
UART_PARITY_ODD
endchoice
- config BT_LE_HCI_UART_TASK_STACK_SIZE
- int "HCI uart task stack size"
- depends on BT_LE_HCI_INTERFACE_USE_UART
- default 1000
+ config BT_LE_HCI_UART_RX_BUFFER_SIZE
+ int "The size of rx ring buffer memory"
+ depends on !BT_LE_HCI_INTERFACE_USE_RAM
+ default 512
+ help
+ The size of rx ring buffer memory
+
+ config BT_LE_HCI_UART_TX_BUFFER_SIZE
+ int "The size of tx ring buffer memory"
+ depends on !BT_LE_HCI_INTERFACE_USE_RAM
+ default 256
+ help
+ The size of tx ring buffer memory
+
+ config BT_LE_HCI_TRANS_TASK_STACK_SIZE
+ int "HCI transport task stack size"
+ depends on !BT_LE_HCI_INTERFACE_USE_RAM
+ default 2048
help
- Set the size of uart task stack
+ This configures stack size of hci transport task
endmenu
config BT_LE_CONTROLLER_NPL_OS_PORTING_SUPPORT
@@ -95,85 +109,99 @@ menuconfig BT_LE_50_FEATURE_SUPPORT
help
Enable BLE 5 feature
-config BT_LE_LL_CFG_FEAT_LE_2M_PHY
- bool "Enable 2M Phy"
- depends on BT_LE_50_FEATURE_SUPPORT
- default y
- help
- Enable 2M-PHY
-
-config BT_LE_LL_CFG_FEAT_LE_CODED_PHY
- bool "Enable coded Phy"
- depends on BT_LE_50_FEATURE_SUPPORT
- default y
- help
- Enable coded-PHY
-
-config BT_LE_EXT_ADV
- bool "Enable extended advertising"
- depends on BT_LE_50_FEATURE_SUPPORT
- default y
- help
- Enable this option to do extended advertising. Extended advertising
- will be supported from BLE 5.0 onwards.
-
-if BT_LE_EXT_ADV
- config BT_LE_MAX_EXT_ADV_INSTANCES
- int "Maximum number of extended advertising instances."
- range 0 4
- default 1
- depends on BT_LE_EXT_ADV
- help
- Change this option to set maximum number of extended advertising
- instances. Minimum there is always one instance of
- advertising. Enter how many more advertising instances you
- want.
- Each extended advertising instance will take about 0.5k DRAM.
-
- config BT_LE_EXT_ADV_MAX_SIZE
- int "Maximum length of the advertising data."
- range 0 1650
- default 1650
- depends on BT_LE_EXT_ADV
+if BT_LE_50_FEATURE_SUPPORT
+ config BT_LE_LL_CFG_FEAT_LE_2M_PHY
+ bool "Enable 2M Phy"
+ depends on BT_LE_50_FEATURE_SUPPORT
+ default y
help
- Defines the length of the extended adv data. The value should not
- exceed 1650.
+ Enable 2M-PHY
- config BT_LE_ENABLE_PERIODIC_ADV
- bool "Enable periodic advertisement."
+ config BT_LE_LL_CFG_FEAT_LE_CODED_PHY
+ bool "Enable coded Phy"
+ depends on BT_LE_50_FEATURE_SUPPORT
default y
- depends on BT_LE_EXT_ADV
help
- Enable this option to start periodic advertisement.
+ Enable coded-PHY
- config BT_LE_PERIODIC_ADV_SYNC_TRANSFER
- bool "Enable Transfer Sync Events"
- depends on BT_LE_ENABLE_PERIODIC_ADV
+ config BT_LE_EXT_ADV
+ bool "Enable extended advertising"
+ depends on BT_LE_50_FEATURE_SUPPORT
default y
help
- This enables controller transfer periodic sync events to host
+ Enable this option to do extended advertising. Extended advertising
+ will be supported from BLE 5.0 onwards.
+
+ if BT_LE_EXT_ADV
+ config BT_LE_MAX_EXT_ADV_INSTANCES
+ int "Maximum number of extended advertising instances."
+ range 0 4
+ default 1
+ depends on BT_LE_EXT_ADV
+ help
+ Change this option to set maximum number of extended advertising
+ instances. Minimum there is always one instance of
+ advertising. Enter how many more advertising instances you
+ want.
+ Each extended advertising instance will take about 0.5k DRAM.
+
+ config BT_LE_EXT_ADV_MAX_SIZE
+ int "Maximum length of the advertising data."
+ range 0 1650
+ default 1650
+ depends on BT_LE_EXT_ADV
+ help
+ Defines the length of the extended adv data. The value should not
+ exceed 1650.
-endif
+ config BT_LE_ENABLE_PERIODIC_ADV
+ bool "Enable periodic advertisement."
+ default y
+ depends on BT_LE_EXT_ADV
+ help
+ Enable this option to start periodic advertisement.
-config BT_LE_MAX_PERIODIC_SYNCS
- int "Maximum number of periodic advertising syncs"
- depends on BT_LE_50_FEATURE_SUPPORT && !BT_NIMBLE_ENABLED
+ config BT_LE_PERIODIC_ADV_SYNC_TRANSFER
+ bool "Enable Transfer Sync Events"
+ depends on BT_LE_ENABLE_PERIODIC_ADV
+ default y
+ help
+ This enables controller transfer periodic sync events to host
+ endif
- range 0 3
- default 1 if BT_LE_ENABLE_PERIODIC_ADV
- default 0
- help
- Set this option to set the upper limit for number of periodic sync
- connections. This should be less than maximum connections allowed by
- controller.
+ config BT_LE_EXT_SCAN
+ bool "Enable extended scanning"
+ depends on BT_LE_50_FEATURE_SUPPORT && BT_LE_ROLE_OBSERVER_ENABLE
+ default y
+ help
+ Enable this option to do extended scanning.
-config BT_LE_MAX_PERIODIC_ADVERTISER_LIST
- int "Maximum number of periodic advertiser list"
- depends on BT_LE_50_FEATURE_SUPPORT && !BT_NIMBLE_ENABLED
- range 1 5
- default 5
- help
- Set this option to set the upper limit for number of periodic advertiser list.
+ config BT_LE_ENABLE_PERIODIC_SYNC
+ bool "Enable periodic sync"
+ default y
+ depends on BT_LE_EXT_SCAN
+ help
+ Enable this option to receive periodic advertisement.
+
+ if BT_LE_ENABLE_PERIODIC_SYNC
+ config BT_LE_MAX_PERIODIC_SYNCS
+ int "Maximum number of periodic advertising syncs"
+ range 0 3
+ default 1 if BT_LE_ENABLE_PERIODIC_ADV
+ default 0
+ help
+ Set this option to set the upper limit for number of periodic sync
+ connections. This should be less than maximum connections allowed by
+ controller.
+
+ config BT_LE_MAX_PERIODIC_ADVERTISER_LIST
+ int "Maximum number of periodic advertiser list"
+ range 1 5
+ default 5
+ help
+ Set this option to set the upper limit for number of periodic advertiser list.
+ endif
+endif
menu "Memory Settings"
depends on !BT_NIMBLE_ENABLED
@@ -280,6 +308,33 @@ config BT_LE_CONTROLLER_LOG_DUMP_ONLY
help
Only operate in dump mode
+config BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
+ bool "Output ble controller logs to SPI bus (Experimental)"
+ depends on BT_LE_CONTROLLER_LOG_ENABLED
+ depends on !BT_LE_CONTROLLER_LOG_DUMP_ONLY
+ select BT_BLE_LOG_SPI_OUT_ENABLED
+ default n
+ help
+ Output ble controller logs to SPI bus
+
+config BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
+ bool "Store ble controller logs to flash(Experimental)"
+ depends on !BT_LE_CONTROLLER_LOG_DUMP_ONLY
+ depends on BT_LE_CONTROLLER_LOG_ENABLED
+ default n
+ help
+ Store ble controller logs to flash memory.
+
+config BT_LE_CONTROLLER_LOG_PARTITION_SIZE
+ int "size of ble controller log partition(Multiples of 4K)"
+ depends on BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
+ default 65536
+ help
+ The size of ble controller log partition shall be a multiples of 4K.
+ The name of log partition shall be "bt_ctrl_log".
+ The partition type shall be ESP_PARTITION_TYPE_DATA.
+ The partition sub_type shall be ESP_PARTITION_SUBTYPE_ANY.
+
config BT_LE_LOG_CTRL_BUF1_SIZE
int "size of the first BLE controller LOG buffer"
depends on BT_LE_CONTROLLER_LOG_ENABLED
@@ -301,6 +356,19 @@ config BT_LE_LOG_HCI_BUF_SIZE
help
Configure the size of the BLE HCI LOG buffer.
+config BT_LE_CONTROLLER_LOG_WRAP_PANIC_HANDLER_ENABLE
+ bool "Enable wrap panic handler"
+ depends on BT_LE_CONTROLLER_LOG_ENABLED
+ default n
+ help
+ Wrap esp_panic_handler to get controller logs when PC pointer exception crashes.
+
+config BT_LE_CONTROLLER_LOG_TASK_WDT_USER_HANDLER_ENABLE
+ bool "Enable esp_task_wdt_isr_user_handler implementation"
+ depends on BT_LE_CONTROLLER_LOG_ENABLED
+ default n
+ help
+ Implement esp_task_wdt_isr_user_handler to get controller logs when task wdt issue is triggered.
config BT_LE_LL_RESOLV_LIST_SIZE
int "BLE LL Resolving list size"
range 1 5
@@ -356,7 +424,7 @@ config BT_LE_CRYPTO_STACK_MBEDTLS
config BT_LE_WHITELIST_SIZE
int "BLE white list size"
- range 1 15
+ range 1 31
default 12
depends on !BT_NIMBLE_ENABLED
@@ -377,6 +445,23 @@ config BT_LE_LL_SCA
help
Sleep clock accuracy of our device (in ppm)
+config BT_LE_LL_PEER_SCA_SET_ENABLE
+ bool "Enable to set constant peer SCA"
+ default n
+ help
+ Enable setting of constant peer SCA, use this if peer device has SCA larger than 500 PPM.
+ Enable this option, the controller will always use BT_LE_LL_PEER_SCA as the peer SCA value
+ to calculate the window widening instead of the value received from peer device.
+
+
+config BT_LE_LL_PEER_SCA
+ int "Constant peer sleep clock accuracy value"
+ range 0 10000
+ depends on BT_LE_LL_PEER_SCA_SET_ENABLE
+ default 0
+ help
+ Set the sleep clock accuracy of peer device
+
config BT_LE_MAX_CONNECTIONS
int "Maximum number of concurrent connections"
depends on !BT_NIMBLE_ENABLED
@@ -491,14 +576,22 @@ config BT_LE_TX_CCA_ENABLED
help
Enable CCA feature to cancel sending the packet if the signal power is stronger than CCA threshold.
+config BT_LE_DTM_ENABLED
+ bool "Enable Direct Test Mode (DTM) feature"
+ default n
+
config BT_LE_CCA_RSSI_THRESH
int "CCA RSSI threshold value"
depends on BT_LE_TX_CCA_ENABLED
range 20 100
- default 20
+ default 65
help
Power threshold of CCA in unit of -1 dBm.
+config BT_LE_FEAT_LL_ENCRYPTION
+ bool "Enable controller ACL encryption"
+ default y
+
config BT_LE_ROLE_CENTROL_ENABLE
bool "Enable BLE Centrol role function"
depends on !BT_NIMBLE_ENABLED
@@ -526,3 +619,126 @@ config BT_LE_ROLE_OBSERVER_ENABLE
default y
help
Enable observer role function.
+
+choice BT_LE_DFT_TX_POWER_LEVEL_DBM
+ prompt "BLE default Tx power level(dBm)"
+ default BT_LE_DFT_TX_POWER_LEVEL_P9
+ help
+ Specify default Tx power level(dBm).
+ config BT_LE_DFT_TX_POWER_LEVEL_N24
+ bool "-24dBm"
+ config BT_LE_DFT_TX_POWER_LEVEL_N21
+ bool "-21dBm"
+ config BT_LE_DFT_TX_POWER_LEVEL_N18
+ bool "-18dBm"
+ config BT_LE_DFT_TX_POWER_LEVEL_N15
+ bool "-15dBm"
+ config BT_LE_DFT_TX_POWER_LEVEL_N12
+ bool "-12dBm"
+ config BT_LE_DFT_TX_POWER_LEVEL_N9
+ bool "-9dBm"
+ config BT_LE_DFT_TX_POWER_LEVEL_N6
+ bool "-6dBm"
+ config BT_LE_DFT_TX_POWER_LEVEL_N3
+ bool "-3dBm"
+ config BT_LE_DFT_TX_POWER_LEVEL_N0
+ bool "0dBm"
+ config BT_LE_DFT_TX_POWER_LEVEL_P3
+ bool "+3dBm"
+ config BT_LE_DFT_TX_POWER_LEVEL_P6
+ bool "+6dBm"
+ config BT_LE_DFT_TX_POWER_LEVEL_P9
+ bool "+9dBm"
+ config BT_LE_DFT_TX_POWER_LEVEL_P12
+ bool "+12dBm"
+ config BT_LE_DFT_TX_POWER_LEVEL_P15
+ bool "+15dBm"
+ config BT_LE_DFT_TX_POWER_LEVEL_P18
+ bool "+18dBm"
+ config BT_LE_DFT_TX_POWER_LEVEL_P20
+ bool "+20dBm"
+endchoice
+
+config BT_LE_DFT_TX_POWER_LEVEL_DBM_EFF
+ int
+ default -24 if BT_LE_DFT_TX_POWER_LEVEL_N24
+ default -21 if BT_LE_DFT_TX_POWER_LEVEL_N21
+ default -18 if BT_LE_DFT_TX_POWER_LEVEL_N18
+ default -15 if BT_LE_DFT_TX_POWER_LEVEL_N15
+ default -12 if BT_LE_DFT_TX_POWER_LEVEL_N12
+ default -9 if BT_LE_DFT_TX_POWER_LEVEL_N9
+ default -6 if BT_LE_DFT_TX_POWER_LEVEL_N6
+ default -3 if BT_LE_DFT_TX_POWER_LEVEL_N3
+ default 0 if BT_LE_DFT_TX_POWER_LEVEL_N0
+ default 3 if BT_LE_DFT_TX_POWER_LEVEL_P3
+ default 6 if BT_LE_DFT_TX_POWER_LEVEL_P6
+ default 9 if BT_LE_DFT_TX_POWER_LEVEL_P9
+ default 12 if BT_LE_DFT_TX_POWER_LEVEL_P12
+ default 15 if BT_LE_DFT_TX_POWER_LEVEL_P15
+ default 18 if BT_LE_DFT_TX_POWER_LEVEL_P18
+ default 20 if BT_LE_DFT_TX_POWER_LEVEL_P20
+ default 0
+
+config BT_CTRL_RUN_IN_FLASH_ONLY
+ bool "Reduce BLE IRAM usage (READ DOCS FIRST) (EXPERIMENTAL)"
+ default n
+ help
+ Move most IRAM into flash. This will increase the usage of flash and reduce ble performance.
+ Because the code is moved to the flash, the execution speed of the code is reduced.
+ To have a small impact on performance, you need to enable flash suspend (SPI_FLASH_AUTO_SUSPEND).
+
+ - Only one Tx-Rx can be performed in each connection interval. Therefore, reduce the connection interval
+ as much as possible to improve the throughput. If you want higher connection performance, you can
+ enable BT_LE_PLACE_CONN_RELATED_INTO_IRAM to put the connection-related code into iram.
+ - For HCI_LE_Extended_Create_Connection command, only 1M phy's connection parameters will be applied.
+ Other phys' will be ignored.
+ - For extended scanning, we may be unable to receive the extended adv with 300us MAFS.
+ - To match performance, phy needs to be reduced, you need to disable ESP_PHY_IRAM_OPT.
+
+config BT_LE_PLACE_CONN_RELATED_INTO_IRAM
+ bool "Place the connection-related code into IRAM"
+ depends on BT_CTRL_RUN_IN_FLASH_ONLY
+ default n
+
+config BT_LE_PLACE_SLEEP_RELATED_INTO_IRAM
+ bool
+ depends on BT_CTRL_RUN_IN_FLASH_ONLY && BT_LE_SLEEP_ENABLE
+ default y
+
+config BT_LE_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS
+ bool "Enable enhanced Access Address check in CONNECT_IND"
+ default n
+ help
+ Enabling this option will add stricter verification of the Access Address in the CONNECT_IND PDU.
+ This improves security by ensuring that only connection requests with valid Access Addresses are accepted.
+ If disabled, only basic checks are applied, improving compatibility.
+
+menu "BLE disconnects when Instant Passed (0x28) occurs"
+ config BT_LE_CTRL_LLCP_CONN_UPDATE
+ bool "BLE ACL connection update procedure"
+ default n
+ help
+ If this option is enabled, Controller will terminate the connection
+ when Instant Passed (0x28) error occurs during connection update procedure.
+
+ config BT_LE_CTRL_LLCP_CHAN_MAP_UPDATE
+ bool "BLE ACL channel map update procedure"
+ default n
+ help
+ If this option is enabled, Controller will terminate the connection
+ when Instant Passed (0x28) error occurs in channel map update procedure.
+
+ config BT_LE_CTRL_LLCP_PHY_UPDATE
+ bool "BLE ACL PHY update procedure"
+ default n
+ help
+ If this option is enabled, Controller will terminate the connection
+ when Instant Passed (0x28) error occurs in PHY update procedure.
+endmenu
+
+config BT_CTRL_SCAN_BACKOFF_UPPERLIMITMAX
+ int "The value of upperlimitmax during scan backoff procedure"
+ range 1 256
+ default 32
+ help
+ The value of upperlimitmax needs to be a power of 2.
diff --git a/lib/bt/controller/esp32c2/ble.c b/lib/bt/controller/esp32c2/ble.c
new file mode 100644
index 00000000..dd6db35e
--- /dev/null
+++ b/lib/bt/controller/esp32c2/ble.c
@@ -0,0 +1,71 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#include <stdlib.h>
+
+#include "sdkconfig.h"
+#include "esp_bt_cfg.h"
+
+/* External functions or variables
+ ************************************************************************
+ */
+#if (CONFIG_BT_NIMBLE_ENABLED || CONFIG_BT_BLUEDROID_ENABLED)
+void scan_stack_enableAdvFlowCtrlVsCmd(bool en);
+void adv_stack_enableClearLegacyAdvVsCmd(bool en);
+void chanSel_stack_enableSetCsaVsCmd(bool en);
+void hci_stack_enableSetVsEvtMaskVsCmd(bool en);
+
+void adv_stack_enableScanReqRxdVsEvent(bool en);
+void conn_stack_enableChanMapUpdCompVsEvent(bool en);
+void sleep_stack_enableWakeupVsEvent(bool en);
+#endif // (CONFIG_BT_NIMBLE_ENABLED || CONFIG_BT_BLUEDROID_ENABLED)
+
+/* Local functions definition
+ ***************************************************************************
+ */
+#if (CONFIG_BT_NIMBLE_ENABLED || CONFIG_BT_BLUEDROID_ENABLED)
+void ble_stack_enableVsCmds(bool en)
+{
+#if DEFAULT_BT_LE_ROLE_BROADCASTER
+ adv_stack_enableClearLegacyAdvVsCmd(en);
+#endif // DEFAULT_BT_LE_ROLE_BROADCASTER
+
+#if DEFAULT_BT_LE_ROLE_OBSERVER
+ scan_stack_enableAdvFlowCtrlVsCmd(en);
+#endif // DEFAULT_BT_LE_ROLE_OBSERVER
+
+ chanSel_stack_enableSetCsaVsCmd(en);
+ hci_stack_enableSetVsEvtMaskVsCmd(en);
+}
+
+void ble_stack_enableVsEvents(bool en)
+{
+#if DEFAULT_BT_LE_ROLE_BROADCASTER
+ adv_stack_enableScanReqRxdVsEvent(en);
+#endif // DEFAULT_BT_LE_ROLE_BROADCASTER
+ conn_stack_enableChanMapUpdCompVsEvent(en);
+#if CONFIG_BT_LE_SLEEP_ENABLE
+ sleep_stack_enableWakeupVsEvent(en);
+#endif // CONFIG_BT_LE_SLEEP_ENABLE
+}
+#endif // (CONFIG_BT_NIMBLE_ENABLED || CONFIG_BT_BLUEDROID_ENABLED)
+
+int ble_stack_enable(void)
+{
+#if (CONFIG_BT_NIMBLE_ENABLED || CONFIG_BT_BLUEDROID_ENABLED)
+ ble_stack_enableVsCmds(true);
+ ble_stack_enableVsEvents(true);
+#endif // (CONFIG_BT_NIMBLE_ENABLED || CONFIG_BT_BLUEDROID_ENABLED)
+
+ return 0;
+}
+
+void ble_stack_disable(void)
+{
+#if (CONFIG_BT_NIMBLE_ENABLED || CONFIG_BT_BLUEDROID_ENABLED)
+ ble_stack_enableVsEvents(false);
+ ble_stack_enableVsCmds(false);
+#endif // (CONFIG_BT_NIMBLE_ENABLED || CONFIG_BT_BLUEDROID_ENABLED)
+}
diff --git a/lib/bt/controller/esp32c2/ble_priv.h b/lib/bt/controller/esp32c2/ble_priv.h
new file mode 100644
index 00000000..024bb042
--- /dev/null
+++ b/lib/bt/controller/esp32c2/ble_priv.h
@@ -0,0 +1,13 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _BLE_PRIV_H_
+#define _BLE_PRIV_H_
+
+int ble_stack_enable(void);
+
+void ble_stack_disable(void);
+
+#endif // _BLE_PRIV_H_
diff --git a/lib/bt/controller/esp32c2/bt.c b/lib/bt/controller/esp32c2/bt.c
index 29c33326..a329881e 100644
--- a/lib/bt/controller/esp32c2/bt.c
+++ b/lib/bt/controller/esp32c2/bt.c
@@ -1,5 +1,5 @@
/*
- * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -31,10 +31,11 @@
#endif
#include "nimble/nimble_npl_os.h"
-#include "ble_hci_trans.h"
+#include "esp_hci_transport.h"
#include "os/endian.h"
#include "esp_bt.h"
+#include "ble_priv.h"
#include "esp_intr_alloc.h"
#include "esp_sleep.h"
#include "esp_pm.h"
@@ -44,16 +45,13 @@
#include "soc/syscon_reg.h"
#include "soc/modem_clkrst_reg.h"
#include "esp_private/periph_ctrl.h"
-#include "hci_uart.h"
+#include "esp_private/esp_clk_tree_common.h"
#include "bt_osi_mem.h"
-#ifdef CONFIG_BT_BLUEDROID_ENABLED
-#include "hci/hci_hal.h"
-#endif
-
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
#include "esp_private/sleep_modem.h"
#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
+#include "esp_private/esp_modem_clock.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
@@ -67,6 +65,11 @@
#include "hal/efuse_ll.h"
#include "soc/rtc.h"
+
+#if CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
+#include "ble_log/ble_log_spi_out.h"
+#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
+
/* Macro definition
************************************************************************
*/
@@ -79,17 +82,6 @@
#define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5
#define BT_ASSERT_PRINT ets_printf
-
-#ifdef CONFIG_BT_BLUEDROID_ENABLED
-/* ACL_DATA_MBUF_LEADINGSPCAE: The leadingspace in user info header for ACL data */
-#define ACL_DATA_MBUF_LEADINGSPCAE 4
-#endif // CONFIG_BT_BLUEDROID_ENABLED
-
-typedef enum ble_rtc_slow_clk_src {
- BT_SLOW_CLK_SRC_MAIN_XTAL,
- BT_SLOW_CLK_SRC_32K_XTAL_ON_PIN0,
-} ble_rtc_slow_clk_src_t;
-
/* Types definition
************************************************************************
*/
@@ -108,12 +100,12 @@ struct ext_funcs_t {
int (*_esp_intr_free)(void **ret_handle);
void *(* _malloc)(size_t size);
void (*_free)(void *p);
- void (*_hal_uart_start_tx)(int);
- int (*_hal_uart_init_cbs)(int, hci_uart_tx_char, hci_uart_tx_done, hci_uart_rx_char, void *);
- int (*_hal_uart_config)(int, int32_t, uint8_t, uint8_t, uart_parity_t, uart_hw_flowcontrol_t);
- int (*_hal_uart_close)(int);
- void (*_hal_uart_blocking_tx)(int, uint8_t);
- int (*_hal_uart_init)(int, void *);
+ void (*_rsv1)(int);
+ int (*_rsv2)(int, int (*)(void *arg), int (*)(void *arg, uint8_t byte), int (*)(void *arg, uint8_t byte), void *);
+ int (*_rsv3)(int, int32_t, uint8_t, uint8_t, int, int);
+ int (*_rsv4)(int);
+ void (*_rsv5)(int, uint8_t);
+ int (*_rsv6)(int, void *);
int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
void (* _task_delete)(void *task_handle);
void (*_osi_assert)(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
@@ -126,7 +118,12 @@ struct ext_funcs_t {
};
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
-typedef void (*interface_func_t) (uint32_t len, const uint8_t*addr, bool end);
+typedef void (*interface_func_t) (uint32_t len, const uint8_t *addr, uint32_t len_append, const uint8_t *addr_append, uint32_t flag);
+
+enum {
+ BLE_LOG_INTERFACE_FLAG_CONTINUE = 0,
+ BLE_LOG_INTERFACE_FLAG_END,
+};
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
/* External functions or variables
@@ -135,10 +132,12 @@ typedef void (*interface_func_t) (uint32_t len, const uint8_t*addr, bool end);
extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs);
extern int ble_controller_init(esp_bt_controller_config_t *cfg);
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
-extern int ble_log_init_async(interface_func_t bt_controller_log_interface, bool task_create, uint8_t buffers, uint32_t *bufs_size);
+extern int ble_log_init_async(interface_func_t interface, bool task_create, uint8_t buffers, uint32_t *bufs_size);
extern int ble_log_deinit_async(void);
+extern int ble_log_init_simple(interface_func_t interface, void *handler);
+extern void ble_log_deinit_simple(void);
extern void ble_log_async_output_dump_all(bool output);
-extern void esp_panic_handler_reconfigure_wdts(uint32_t timeout_ms);
+extern void esp_panic_handler_feed_wdts(void);
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
extern int ble_controller_deinit(void);
extern int ble_controller_enable(uint8_t mode);
@@ -158,6 +157,9 @@ extern void r_ble_rtc_wake_up_state_clr(void);
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
extern void esp_ble_set_wakeup_overhead(uint32_t overhead);
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
+#if CONFIG_BT_LE_LL_PEER_SCA_SET_ENABLE
+extern void r_ble_ll_customize_peer_sca_set(uint16_t peer_sca);
+#endif // CONFIG_BT_LE_LL_PEER_SCA_SET_ENABLE
extern int os_msys_init(void);
extern void os_msys_buf_free(void);
extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
@@ -170,6 +172,10 @@ extern int ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_cou
extern void bt_track_pll_cap(void);
extern char *ble_controller_get_compile_version(void);
extern const char *r_ble_controller_get_rom_compile_version(void);
+#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
+extern void ble_ll_supported_features_init(void);
+#endif //CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
+
#if CONFIG_BT_RELEASE_IRAM
extern uint32_t _iram_bt_text_start;
extern uint32_t _bss_bt_end;
@@ -191,16 +197,6 @@ static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
static void task_delete_wrapper(void *task_handle);
-#if CONFIG_BT_LE_HCI_INTERFACE_USE_UART
-static void hci_uart_start_tx_wrapper(int uart_no);
-static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func,
- hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg);
-static int hci_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits, uint8_t stopbits,
- uart_parity_t parity, uart_hw_flowcontrol_t flow_ctl);
-static int hci_uart_close_wrapper(int uart_no);
-static void hci_uart_blocking_tx_wrapper(int port, uint8_t data);
-static int hci_uart_init_wrapper(int uart_no, void *cfg);
-#endif // CONFIG_BT_LE_HCI_INTERFACE_USE_UART
static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler,
void *arg, void **ret_handle_in);
static int esp_intr_free_wrapper(void **ret_handle);
@@ -211,16 +207,270 @@ static int esp_ecc_gen_key_pair(uint8_t *pub, uint8_t *priv);
static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
const uint8_t *our_priv_key, uint8_t *out_dhkey);
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
-static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end);
+#if !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
+static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, uint32_t len_append, const uint8_t *addr_append, uint32_t flag);
+#endif // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
+#if CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
+static void esp_bt_ctrl_log_partition_get_and_erase_first_block(void);
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
/* Local variable definition
***************************************************************************
*/
+#if (CONFIG_ESP32C2_REV_MIN_FULL < 200) && (!CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY)
+void *g_ble_lll_rfmgmt_env_p;
+#endif
/* Static variable declare */
static DRAM_ATTR esp_bt_controller_status_t ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
const static uint32_t log_bufs_size[] = {CONFIG_BT_LE_LOG_CTRL_BUF1_SIZE, CONFIG_BT_LE_LOG_HCI_BUF_SIZE, CONFIG_BT_LE_LOG_CTRL_BUF2_SIZE};
+static bool log_is_inited = false;
+
+esp_err_t esp_bt_controller_log_init(void)
+{
+ if (log_is_inited) {
+ return ESP_OK;
+ }
+
+#if CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
+ if (ble_log_spi_out_init() != 0) {
+ goto spi_out_init_failed;
+ }
+#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
+
+#if CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
+ if (ble_log_init_simple(ble_log_spi_out_ll_write, ble_log_spi_out_ll_log_ev_proc) != 0) {
+ goto log_init_failed;
+ }
+#else // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
+ uint8_t buffers = 0;
+#if CONFIG_BT_LE_CONTROLLER_LOG_CTRL_ENABLED
+ buffers |= ESP_BLE_LOG_BUF_CONTROLLER;
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_CTRL_ENABLED
+#if CONFIG_BT_LE_CONTROLLER_LOG_HCI_ENABLED
+ buffers |= ESP_BLE_LOG_BUF_HCI;
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_HCI_ENABLED
+
+ bool task_create = true;
+#if CONFIG_BT_LE_CONTROLLER_LOG_DUMP_ONLY
+ task_create = false;
+#elif CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
+ esp_bt_ctrl_log_partition_get_and_erase_first_block();
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
+
+ if (ble_log_init_async(esp_bt_controller_log_interface, task_create, buffers, (uint32_t *)log_bufs_size) != 0) {
+ goto log_init_failed;
+ }
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
+
+ log_is_inited = true;
+ return ESP_OK;
+
+log_init_failed:
+#if CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
+ ble_log_spi_out_deinit();
+spi_out_init_failed:
+#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
+ return ESP_FAIL;
+}
+
+void esp_bt_controller_log_deinit(void)
+{
+#if CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
+ ble_log_spi_out_deinit();
+#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
+
+#if CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
+ ble_log_deinit_simple();
+#else // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
+ ble_log_deinit_async();
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
+
+ log_is_inited = false;
+}
+
+#if CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
+#include "esp_partition.h"
+#include "hal/wdt_hal.h"
+
+#define MAX_STORAGE_SIZE (CONFIG_BT_LE_CONTROLLER_LOG_PARTITION_SIZE)
+#define BLOCK_SIZE (4096)
+#define THRESHOLD (3072)
+#define PARTITION_NAME "bt_ctrl_log"
+
+static const esp_partition_t *log_partition;
+static uint32_t write_index = 0;
+static uint32_t next_erase_index = BLOCK_SIZE;
+static bool block_erased = false;
+static bool stop_write = false;
+static bool is_filled = false;
+
+static void esp_bt_ctrl_log_partition_get_and_erase_first_block(void)
+{
+ log_partition = NULL;
+ assert(MAX_STORAGE_SIZE % BLOCK_SIZE == 0);
+ // Find the partition map in the partition table
+ log_partition = esp_partition_find_first(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_ANY, PARTITION_NAME);
+ assert(log_partition != NULL);
+ // Prepare data to be read later using the mapped address
+ ESP_ERROR_CHECK(esp_partition_erase_range(log_partition, 0, BLOCK_SIZE));
+ write_index = 0;
+ next_erase_index = BLOCK_SIZE;
+ block_erased = false;
+ is_filled = false;
+ stop_write = false;
+}
+
+static int esp_bt_controller_log_storage(uint32_t len, const uint8_t *addr, bool end)
+{
+ if (len > MAX_STORAGE_SIZE) {
+ return -1;
+ }
+
+ if (stop_write) {
+ return 0;
+ }
+
+ assert(log_partition != NULL);
+ if (((write_index) % BLOCK_SIZE) >= THRESHOLD && !block_erased) {
+ // esp_rom_printf("Ers nxt: %d,%d\n", next_erase_index, write_index);
+ esp_partition_erase_range(log_partition, next_erase_index, BLOCK_SIZE);
+ next_erase_index = (next_erase_index + BLOCK_SIZE) % MAX_STORAGE_SIZE;
+ block_erased = true;
+ }
+
+ if (((write_index + len) / BLOCK_SIZE) > (write_index / BLOCK_SIZE)) {
+ block_erased = false;
+ }
+
+ if (write_index + len <= MAX_STORAGE_SIZE) {
+ esp_partition_write(log_partition, write_index, addr, len);
+ write_index = (write_index + len) % MAX_STORAGE_SIZE;
+ } else {
+ uint32_t first_part_len = MAX_STORAGE_SIZE - write_index;
+ esp_partition_write(log_partition, write_index, addr, first_part_len);
+ esp_partition_write(log_partition, 0, addr + first_part_len, len - first_part_len);
+ write_index = len - first_part_len;
+ is_filled = true;
+ // esp_rom_printf("old idx: %d,%d\n",next_erase_index, write_index);
+ }
+
+ return 0;
+}
+
+void esp_bt_read_ctrl_log_from_flash(bool output)
+{
+ esp_partition_mmap_handle_t mmap_handle;
+ uint32_t read_index;
+ const void *mapped_ptr;
+ const uint8_t *buffer;
+ uint32_t print_len;
+ uint32_t max_print_len;
+ esp_err_t err;
+
+ print_len = 0;
+ max_print_len = 4096;
+ err = esp_partition_mmap(log_partition, 0, MAX_STORAGE_SIZE, ESP_PARTITION_MMAP_DATA, &mapped_ptr, &mmap_handle);
+ if (err != ESP_OK) {
+ ESP_LOGE("FLASH", "Mmap failed: %s", esp_err_to_name(err));
+ return;
+ }
+
+ portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
+ portENTER_CRITICAL_SAFE(&spinlock);
+ esp_panic_handler_feed_wdts();
+ ble_log_async_output_dump_all(true);
+ esp_bt_controller_log_deinit();
+ stop_write = true;
+
+ buffer = (const uint8_t *)mapped_ptr;
+ esp_panic_handler_feed_wdts();
+ if (is_filled) {
+ read_index = next_erase_index;
+ } else {
+ read_index = 0;
+ }
+
+ esp_rom_printf("\r\nREAD_CHECK:%ld,%ld,%d\r\n",read_index, write_index, is_filled);
+ esp_rom_printf("\r\n[DUMP_START:");
+ while (read_index != write_index) {
+ esp_rom_printf("%02x ", buffer[read_index]);
+ if (print_len > max_print_len) {
+ esp_panic_handler_feed_wdts();
+ print_len = 0;
+ }
+
+ print_len++;
+ read_index = (read_index + 1) % MAX_STORAGE_SIZE;
+ }
+ esp_rom_printf(":DUMP_END]\r\n");
+ portEXIT_CRITICAL_SAFE(&spinlock);
+ esp_partition_munmap(mmap_handle);
+ err = esp_bt_controller_log_init();
+ assert(err == ESP_OK);
+
+}
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
+
+#if !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
+static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, uint32_t len_append, const uint8_t *addr_append, uint32_t flag)
+{
+ bool end = (flag & BIT(BLE_LOG_INTERFACE_FLAG_END));
+#if CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
+ esp_bt_controller_log_storage(len, addr, end);
+#else // !CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
+ portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
+ portENTER_CRITICAL_SAFE(&spinlock);
+ esp_panic_handler_feed_wdts();
+
+ if (len && addr) {
+ for (int i = 0; i < len; i++) { esp_rom_printf("%02x ", addr[i]); }
+ }
+ if (len_append && addr_append) {
+ for (int i = 0; i < len_append; i++) { esp_rom_printf("%02x ", addr_append[i]); }
+ }
+ if (end) { esp_rom_printf("\n"); }
+
+ portEXIT_CRITICAL_SAFE(&spinlock);
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
+}
+#endif // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
+
+void esp_ble_controller_log_dump_all(bool output)
+{
+#if CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
+ ble_log_spi_out_dump_all();
+#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
+
+#if CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
+ esp_bt_read_ctrl_log_from_flash(output);
+#elif !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
+ portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
+ portENTER_CRITICAL_SAFE(&spinlock);
+ esp_panic_handler_feed_wdts();
+ BT_ASSERT_PRINT("\r\n[DUMP_START:");
+ ble_log_async_output_dump_all(output);
+ BT_ASSERT_PRINT(":DUMP_END]\r\n");
+ portEXIT_CRITICAL_SAFE(&spinlock);
+#endif
+}
+
+#if CONFIG_BT_LE_CONTROLLER_LOG_TASK_WDT_USER_HANDLER_ENABLE
+void esp_task_wdt_isr_user_handler(void)
+{
+ esp_ble_controller_log_dump_all(true);
+}
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_TASK_WDT_USER_HANDLER_ENABLE
+
+#if CONFIG_BT_LE_CONTROLLER_LOG_WRAP_PANIC_HANDLER_ENABLE
+void __real_esp_panic_handler(void *info);
+void __wrap_esp_panic_handler (void *info)
+{
+ esp_ble_controller_log_dump_all(true);
+ __real_esp_panic_handler(info);
+}
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_WRAP_PANIC_HANDLER_ENABLE
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
/* This variable tells if BLE is running */
@@ -229,9 +479,27 @@ static bool s_ble_active = false;
static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock = NULL;
#define BTDM_MIN_TIMER_UNCERTAINTY_US (200)
#endif // CONFIG_PM_ENABLE
+#ifdef CONFIG_XTAL_FREQ_26
+#define MAIN_XTAL_FREQ_HZ (26000000)
+static DRAM_ATTR uint32_t s_bt_lpclk_freq = 40000;
+#else
+#define MAIN_XTAL_FREQ_HZ (40000000)
+static DRAM_ATTR uint32_t s_bt_lpclk_freq = 32000;
+#endif
+static DRAM_ATTR modem_clock_lpclk_src_t s_bt_lpclk_src = MODEM_CLOCK_LPCLK_SRC_INVALID;
#define BLE_RTC_DELAY_US (1800)
+#define BLE_CONTROLLER_MALLOC_CAPS (MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT|MALLOC_CAP_DMA)
+void *malloc_ble_controller_mem(size_t size)
+{
+ return heap_caps_malloc(size, BLE_CONTROLLER_MALLOC_CAPS);
+}
+
+uint32_t get_ble_controller_free_heap_size(void)
+{
+ return heap_caps_get_free_size(BLE_CONTROLLER_MALLOC_CAPS);
+}
static const struct osi_coex_funcs_t s_osi_coex_funcs_ro = {
._magic = OSI_COEX_MAGIC_VALUE,
@@ -248,14 +516,6 @@ struct ext_funcs_t ext_funcs_ro = {
._esp_intr_free = esp_intr_free_wrapper,
._malloc = bt_osi_mem_malloc_internal,
._free = bt_osi_mem_free,
-#if CONFIG_BT_LE_HCI_INTERFACE_USE_UART
- ._hal_uart_start_tx = hci_uart_start_tx_wrapper,
- ._hal_uart_init_cbs = hci_uart_init_cbs_wrapper,
- ._hal_uart_config = hci_uart_config_wrapper,
- ._hal_uart_close = hci_uart_close_wrapper,
- ._hal_uart_blocking_tx = hci_uart_blocking_tx_wrapper,
- ._hal_uart_init = hci_uart_init_wrapper,
-#endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART
._task_create = task_create_wrapper,
._task_delete = task_delete_wrapper,
._osi_assert = osi_assert_wrapper,
@@ -302,83 +562,6 @@ static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
#endif // CONFIG_SW_COEXIST_ENABLE
}
-#ifdef CONFIG_BT_BLUEDROID_ENABLED
-bool esp_vhci_host_check_send_available(void)
-{
- if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
- return false;
- }
- return true;
-}
-
-/**
- * Allocates an mbuf for use by the nimble host.
- */
-static struct os_mbuf *ble_hs_mbuf_gen_pkt(uint16_t leading_space)
-{
- struct os_mbuf *om;
- int rc;
-
- om = os_msys_get_pkthdr(0, 0);
- if (om == NULL) {
- return NULL;
- }
-
- if (om->om_omp->omp_databuf_len < leading_space) {
- rc = os_mbuf_free_chain(om);
- assert(rc == 0);
- return NULL;
- }
-
- om->om_data += leading_space;
-
- return om;
-}
-
-/**
- * Allocates an mbuf suitable for an HCI ACL data packet.
- *
- * @return An empty mbuf on success; null on memory
- * exhaustion.
- */
-struct os_mbuf *ble_hs_mbuf_acl_pkt(void)
-{
- return ble_hs_mbuf_gen_pkt(4 + 1);
-}
-
-void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
-{
- if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
- return;
- }
-
- if (*(data) == DATA_TYPE_COMMAND) {
- struct ble_hci_cmd *cmd = NULL;
- cmd = (struct ble_hci_cmd *) ble_hci_trans_buf_alloc(BLE_HCI_TRANS_BUF_CMD);
- assert(cmd);
- memcpy((uint8_t *)cmd, data + 1, len - 1);
- ble_hci_trans_hs_cmd_tx((uint8_t *)cmd);
- }
-
- if (*(data) == DATA_TYPE_ACL) {
- struct os_mbuf *om = os_msys_get_pkthdr(len, ACL_DATA_MBUF_LEADINGSPCAE);
- assert(om);
- assert(os_mbuf_append(om, &data[1], len - 1) == 0);
- ble_hci_trans_hs_acl_tx(om);
- }
-}
-
-esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
-{
- if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
- return ESP_FAIL;
- }
-
- ble_hci_trans_cfg_hs(ble_hs_hci_rx_evt, NULL, ble_hs_rx_data, NULL);
-
- return ESP_OK;
-}
-#endif // CONFIG_BT_BLUEDROID_ENABLED
static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
{
return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < CONFIG_FREERTOS_NUMBER_OF_CORES ? core_id : tskNO_AFFINITY));
@@ -408,78 +591,65 @@ static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer
return rc;
}
-#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
-static void hci_uart_start_tx_wrapper(int uart_no)
-{
- hci_uart_start_tx(uart_no);
-}
-
-static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func,
- hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg)
+static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in)
{
- int rc = -1;
- rc = hci_uart_init_cbs(uart_no, tx_func, tx_done, rx_func, arg);
- return rc;
-}
-
+#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
+ int rc = esp_intr_alloc(source, flags, handler, arg, (intr_handle_t *)ret_handle_in);
+#else
+ int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler, arg, (intr_handle_t *)ret_handle_in);
+#endif
-static int hci_uart_config_wrapper(int port_num, int32_t baud_rate, uint8_t data_bits,
- uint8_t stop_bits,uart_parity_t parity,
- uart_hw_flowcontrol_t flow_ctl)
-{
- int rc = -1;
- rc = hci_uart_config(port_num, baud_rate, data_bits, stop_bits, parity, flow_ctl);
return rc;
}
-static int hci_uart_close_wrapper(int uart_no)
+static int esp_intr_free_wrapper(void **ret_handle)
{
- int rc = -1;
- rc = hci_uart_close(uart_no);
+ int rc = 0;
+ rc = esp_intr_free((intr_handle_t) * ret_handle);
+ *ret_handle = NULL;
return rc;
}
-static void hci_uart_blocking_tx_wrapper(int port, uint8_t data)
+modem_clock_lpclk_src_t esp_bt_get_lpclk_src(void)
{
- //This function is nowhere to use.
+ return s_bt_lpclk_src;
}
-static int hci_uart_init_wrapper(int uart_no, void *cfg)
+void esp_bt_set_lpclk_src(modem_clock_lpclk_src_t clk_src)
{
- //This function is nowhere to use.
- return 0;
-}
+ if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
+ return;
+ }
-#endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART
+ if (clk_src >= MODEM_CLOCK_LPCLK_SRC_MAX) {
+ return;
+ }
-static int ble_hci_unregistered_hook(void*, void*)
-{
- ESP_LOGD(NIMBLE_PORT_LOG_TAG,"%s ble hci rx_evt is not registered.",__func__);
- return 0;
+ s_bt_lpclk_src = clk_src;
}
-static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in)
+uint32_t esp_bt_get_lpclk_freq(void)
{
- int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler, arg, (intr_handle_t *)ret_handle_in);
- return rc;
+ return s_bt_lpclk_freq;
}
-static int esp_intr_free_wrapper(void **ret_handle)
+void esp_bt_set_lpclk_freq(uint32_t clk_freq)
{
- int rc = 0;
- rc = esp_intr_free((intr_handle_t) * ret_handle);
- *ret_handle = NULL;
- return rc;
-}
+ if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
+ return;
+ }
+ if (!clk_freq) {
+ return;
+ }
-#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
-void sleep_modem_light_sleep_overhead_set(uint32_t overhead)
-{
- esp_ble_set_wakeup_overhead(overhead);
+ if (MAIN_XTAL_FREQ_HZ % clk_freq) {
+ return;
+ }
+
+ s_bt_lpclk_freq = clk_freq;
}
-#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
-IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
+void controller_sleep_cb(uint32_t enable_tick, void *arg)
{
if (!s_ble_active) {
return;
@@ -492,20 +662,27 @@ IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
s_ble_active = false;
}
-IRAM_ATTR void controller_wakeup_cb(void *arg)
+void controller_wakeup_cb(void *arg)
{
if (s_ble_active) {
return;
}
- esp_phy_enable(PHY_MODEM_BT);
- // need to check if need to call pm lock here
#ifdef CONFIG_PM_ENABLE
+ esp_pm_config_t pm_config;
esp_pm_lock_acquire(s_pm_lock);
+ esp_pm_get_configuration(&pm_config);
+ assert(esp_rom_get_cpu_ticks_per_us() == pm_config.max_freq_mhz);
#endif //CONFIG_PM_ENABLE
+ esp_phy_enable(PHY_MODEM_BT);
+ if (s_bt_lpclk_src == MODEM_CLOCK_LPCLK_SRC_RC_SLOW) {
+ uint32_t *clk_freq = (uint32_t *)arg;
+ *clk_freq = esp_clk_tree_lp_slow_get_freq_hz(ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED) / 5;
+ }
+ // need to check if need to call pm lock here
s_ble_active = true;
}
-esp_err_t controller_sleep_init(ble_rtc_slow_clk_src_t slow_clk_src)
+esp_err_t controller_sleep_init(modem_clock_lpclk_src_t slow_clk_src)
{
esp_err_t rc = 0;
#ifdef CONFIG_BT_LE_SLEEP_ENABLE
@@ -513,7 +690,7 @@ esp_err_t controller_sleep_init(ble_rtc_slow_clk_src_t slow_clk_src)
r_ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0, 500 + BLE_RTC_DELAY_US);
#ifdef CONFIG_PM_ENABLE
- if (slow_clk_src == BT_SLOW_CLK_SRC_MAIN_XTAL) {
+ if (slow_clk_src == MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL) {
esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_ON);
} else {
esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_AUTO);
@@ -532,7 +709,7 @@ esp_err_t controller_sleep_init(ble_rtc_slow_clk_src_t slow_clk_src)
esp_sleep_enable_bt_wakeup();
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is BLE timer");
- rc = esp_pm_register_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
+ rc = esp_pm_register_inform_out_light_sleep_overhead_callback(esp_ble_set_wakeup_overhead);
if (rc != ESP_OK) {
goto error;
}
@@ -542,7 +719,7 @@ esp_err_t controller_sleep_init(ble_rtc_slow_clk_src_t slow_clk_src)
error:
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
esp_sleep_disable_bt_wakeup();
- esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
+ esp_pm_unregister_inform_out_light_sleep_overhead_callback(esp_ble_set_wakeup_overhead);
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
/*lock should release first and then delete*/
if (s_pm_lock != NULL) {
@@ -559,7 +736,7 @@ void controller_sleep_deinit(void)
r_ble_rtc_wake_up_state_clr();
esp_sleep_disable_bt_wakeup();
esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_AUTO);
- esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
+ esp_pm_unregister_inform_out_light_sleep_overhead_callback(esp_ble_set_wakeup_overhead);
#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
#ifdef CONFIG_PM_ENABLE
/*lock should release first and then delete*/
@@ -568,23 +745,19 @@ void controller_sleep_deinit(void)
#endif //CONFIG_PM_ENABLE
}
-static void esp_bt_rtc_slow_clk_select(ble_rtc_slow_clk_src_t slow_clk_src)
+static void esp_bt_rtc_slow_clk_select(modem_clock_lpclk_src_t slow_clk_src)
{
/* Select slow clock source for BT momdule */
switch (slow_clk_src) {
- case BT_SLOW_CLK_SRC_MAIN_XTAL:
+ case MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL:
ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using main XTAL as clock source");
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_XTAL32K_S);
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 1, MODEM_CLKRST_LP_TIMER_SEL_XTAL_S);
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_8M_S);
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_RTC_SLOW_S);
-#ifdef CONFIG_XTAL_FREQ_26
- SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 129, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S);
-#else
- SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 249, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S);
-#endif // CONFIG_XTAL_FREQ_26
+ SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, (MAIN_XTAL_FREQ_HZ/(5 * s_bt_lpclk_freq) - 1), MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S);
break;
- case BT_SLOW_CLK_SRC_32K_XTAL_ON_PIN0:
+ case MODEM_CLOCK_LPCLK_SRC_EXT32K:
ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using external 32.768 kHz XTAL as clock source");
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 1, MODEM_CLKRST_LP_TIMER_SEL_XTAL32K_S);
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_XTAL_S);
@@ -592,6 +765,14 @@ static void esp_bt_rtc_slow_clk_select(ble_rtc_slow_clk_src_t slow_clk_src)
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_RTC_SLOW_S);
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 0, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S);
break;
+ case MODEM_CLOCK_LPCLK_SRC_RC_SLOW:
+ ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Using 136 kHz RC as clock source, use with caution as it may not maintain ACL or Sync process due to low clock accuracy!");
+ SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_XTAL32K_S);
+ SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_XTAL_S);
+ SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_8M_S);
+ SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 1, MODEM_CLKRST_LP_TIMER_SEL_RTC_SLOW_S);
+ SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 0, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S);
+ break;
default:
ESP_LOGE(NIMBLE_PORT_LOG_TAG, "Unsupported slow clock");
assert(0);
@@ -601,40 +782,43 @@ static void esp_bt_rtc_slow_clk_select(ble_rtc_slow_clk_src_t slow_clk_src)
SET_PERI_REG_BITS(MODEM_CLKRST_ETM_CLK_CONF_REG, 1, 0, MODEM_CLKRST_ETM_CLK_SEL_S);
}
-static ble_rtc_slow_clk_src_t ble_rtc_clk_init(esp_bt_controller_config_t *cfg)
+static modem_clock_lpclk_src_t ble_rtc_clk_init(esp_bt_controller_config_t *cfg)
{
- ble_rtc_slow_clk_src_t slow_clk_src;
-
+ if (s_bt_lpclk_src == MODEM_CLOCK_LPCLK_SRC_INVALID) {
#if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL
-#ifdef CONFIG_XTAL_FREQ_26
- cfg->rtc_freq = 40000;
+ s_bt_lpclk_src = MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL;
#else
- cfg->rtc_freq = 32000;
-#endif // CONFIG_XTAL_FREQ_26
- slow_clk_src = BT_SLOW_CLK_SRC_MAIN_XTAL;
-#else
- if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {
- cfg->rtc_freq = 32768;
- slow_clk_src = BT_SLOW_CLK_SRC_32K_XTAL_ON_PIN0;
- } else {
- ESP_LOGW(NIMBLE_PORT_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock");
-#ifdef CONFIG_XTAL_FREQ_26
- cfg->rtc_freq = 40000;
-#else
- cfg->rtc_freq = 32000;
-#endif // CONFIG_XTAL_FREQ_26
- slow_clk_src = BT_SLOW_CLK_SRC_MAIN_XTAL;
+#if CONFIG_RTC_CLK_SRC_INT_RC
+ s_bt_lpclk_src = MODEM_CLOCK_LPCLK_SRC_RC_SLOW;
+#elif CONFIG_RTC_CLK_SRC_EXT_OSC
+ if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {
+ s_bt_lpclk_src = MODEM_CLOCK_LPCLK_SRC_EXT32K;
+ } else {
+ ESP_LOGW(NIMBLE_PORT_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock");
+ s_bt_lpclk_src = MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL;
+ }
+#endif // CONFIG_RTC_CLK_SRC_INT_RC
+#endif // CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL
}
-#endif /* CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL */
- esp_bt_rtc_slow_clk_select(slow_clk_src);
- return slow_clk_src;
+
+ if (s_bt_lpclk_src == MODEM_CLOCK_LPCLK_SRC_EXT32K) {
+ cfg->rtc_freq = 32768;
+ } else if (s_bt_lpclk_src == MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL) {
+ cfg->rtc_freq = s_bt_lpclk_freq;
+ } else if (s_bt_lpclk_src == MODEM_CLOCK_LPCLK_SRC_RC_SLOW) {
+ cfg->rtc_freq = esp_clk_tree_lp_slow_get_freq_hz(ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED) / 5;
+ cfg->ble_ll_sca = 3000;
+ }
+ esp_bt_rtc_slow_clk_select(s_bt_lpclk_src);
+ return s_bt_lpclk_src;
}
esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
{
esp_err_t ret = ESP_OK;
ble_npl_count_info_t npl_info;
- ble_rtc_slow_clk_src_t rtc_clk_src;
+ modem_clock_lpclk_src_t rtc_clk_src;
+ uint8_t hci_transport_mode;
memset(&npl_info, 0, sizeof(ble_npl_count_info_t));
if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
@@ -655,6 +839,8 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
return ret;
}
+ /* If we place the ble code into flash, don't need to initialize ROM. */
+#if !CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
#if DEFAULT_BT_LE_50_FEATURE_SUPPORT || DEFAULT_BT_LE_ROLE_CENTROL || DEFAULT_BT_LE_ROLE_OBSERVER
extern int esp_ble_rom_func_ptr_init_all(void);
esp_ble_rom_func_ptr_init_all();
@@ -663,6 +849,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
extern int esp_ble_rom_func_ptr_init_legacy_adv_and_slave(void);
esp_ble_rom_func_ptr_init_legacy_adv_and_slave();
#endif
+#endif //!CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
/* Initialize the function pointers for OS porting */
npl_freertos_funcs_init();
@@ -712,30 +899,26 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
#if CONFIG_SW_COEXIST_ENABLE
coex_init();
#endif
+
+#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
+ ble_ll_supported_features_init();
+#endif //CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
+
ret = ble_controller_init(cfg);
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", ret);
goto modem_deint;
}
+#if CONFIG_BT_LE_LL_PEER_SCA_SET_ENABLE
+ r_ble_ll_customize_peer_sca_set(CONFIG_BT_LE_LL_PEER_SCA);
+#endif // CONFIG_BT_LE_LL_PEER_SCA_SET_ENABLE
+
ESP_LOGI(NIMBLE_PORT_LOG_TAG, "ble controller commit:[%s]", ble_controller_get_compile_version());
ESP_LOGI(NIMBLE_PORT_LOG_TAG, "ble rom commit:[%s]", r_ble_controller_get_rom_compile_version());
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
- interface_func_t bt_controller_log_interface;
- bt_controller_log_interface = esp_bt_controller_log_interface;
- uint8_t buffers = 0;
-#if CONFIG_BT_LE_CONTROLLER_LOG_CTRL_ENABLED
- buffers |= ESP_BLE_LOG_BUF_CONTROLLER;
-#endif // CONFIG_BT_LE_CONTROLLER_LOG_CTRL_ENABLED
-#if CONFIG_BT_LE_CONTROLLER_LOG_HCI_ENABLED
- buffers |= ESP_BLE_LOG_BUF_HCI;
-#endif // CONFIG_BT_LE_CONTROLLER_LOG_HCI_ENABLED
-#if CONFIG_BT_LE_CONTROLLER_LOG_DUMP_ONLY
- ret = ble_log_init_async(bt_controller_log_interface, false, buffers, (uint32_t *)log_bufs_size);
-#else
- ret = ble_log_init_async(bt_controller_log_interface, true, buffers, (uint32_t *)log_bufs_size);
-#endif // CONFIG_BT_CONTROLLER_LOG_DUMP
+ ret = esp_bt_controller_log_init();
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_log_init failed %d", ret);
goto controller_init_err;
@@ -751,20 +934,32 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
uint8_t mac[6];
ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT));
+ ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Bluetooth MAC: %02x:%02x:%02x:%02x:%02x:%02x",
+ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+
swap_in_place(mac, 6);
esp_ble_ll_set_public_addr(mac);
ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
- ble_hci_trans_cfg_hs((ble_hci_trans_rx_cmd_fn *)ble_hci_unregistered_hook,NULL,
- (ble_hci_trans_rx_acl_fn *)ble_hci_unregistered_hook,NULL);
+#if CONFIG_BT_LE_HCI_INTERFACE_USE_RAM
+ hci_transport_mode = HCI_TRANSPORT_VHCI;
+#elif CONFIG_BT_LE_HCI_INTERFACE_USE_UART
+ hci_transport_mode = HCI_TRANSPORT_UART_NO_DMA;
+#endif // CONFIG_BT_LE_HCI_INTERFACE_USE_RAM
+ ret = hci_transport_init(hci_transport_mode);
+ if (ret) {
+ ESP_LOGW(NIMBLE_PORT_LOG_TAG, "hci transport init failed %d", ret);
+ goto free_controller;
+ }
return ESP_OK;
free_controller:
+ hci_transport_deinit();
controller_sleep_deinit();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
controller_init_err:
- ble_log_deinit_async();
+ esp_bt_controller_log_deinit();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
ble_controller_deinit();
modem_deint:
@@ -789,10 +984,11 @@ esp_err_t esp_bt_controller_deinit(void)
return ESP_FAIL;
}
+ hci_transport_deinit();
controller_sleep_deinit();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
- ble_log_deinit_async();
+ esp_bt_controller_log_deinit();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
ble_controller_deinit();
@@ -846,6 +1042,12 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
#if CONFIG_SW_COEXIST_ENABLE
coex_enable();
#endif
+
+ if (ble_stack_enable() != 0) {
+ ret = ESP_FAIL;
+ goto error;
+ }
+
if (ble_controller_enable(mode) != 0) {
ret = ESP_FAIL;
goto error;
@@ -855,6 +1057,7 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
return ESP_OK;
error:
+ ble_stack_disable();
#if CONFIG_SW_COEXIST_ENABLE
coex_disable();
#endif
@@ -877,7 +1080,7 @@ esp_err_t esp_bt_controller_disable(void)
if (ble_controller_disable() != 0) {
return ESP_FAIL;
}
-
+ ble_stack_disable();
if (s_ble_active) {
esp_phy_disable(PHY_MODEM_BT);
#if CONFIG_PM_ENABLE
@@ -1028,9 +1231,17 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
switch (power_type) {
case ESP_BLE_PWR_TYPE_DEFAULT:
+ if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
+ stat = ESP_OK;
+ }
+ break;
case ESP_BLE_PWR_TYPE_ADV:
+ if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_ADV, 0xFF, power_level) == 0) {
+ stat = ESP_OK;
+ }
+ break;
case ESP_BLE_PWR_TYPE_SCAN:
- if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
+ if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1060,9 +1271,13 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type
esp_err_t stat = ESP_FAIL;
switch (power_type) {
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
+ if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
+ stat = ESP_OK;
+ }
+ break;
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
- if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
+ if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1085,11 +1300,15 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
int tx_level = 0;
switch (power_type) {
- case ESP_BLE_PWR_TYPE_ADV:
- case ESP_BLE_PWR_TYPE_SCAN:
case ESP_BLE_PWR_TYPE_DEFAULT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
+ case ESP_BLE_PWR_TYPE_ADV:
+ tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_ADV, 0);
+ break;
+ case ESP_BLE_PWR_TYPE_SCAN:
+ tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0);
+ break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
case ESP_BLE_PWR_TYPE_CONN_HDL2:
@@ -1118,9 +1337,11 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
switch (power_type) {
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
+ tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
+ break;
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
- tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
+ tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
@@ -1142,30 +1363,6 @@ uint8_t esp_ble_get_chip_rev_version(void)
return efuse_ll_get_chip_wafer_version_minor();
}
-#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
-static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end)
-{
- for (int i = 0; i < len; i++) {
- esp_rom_printf("%02x ", addr[i]);
- }
- if (end) {
- esp_rom_printf("\n");
- }
-}
-
-void esp_ble_controller_log_dump_all(bool output)
-{
- portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
-
- portENTER_CRITICAL_SAFE(&spinlock);
- esp_panic_handler_reconfigure_wdts(5000);
- BT_ASSERT_PRINT("\r\n[DUMP_START:");
- ble_log_async_output_dump_all(output);
- BT_ASSERT_PRINT(":DUMP_END]\r\n");
- portEXIT_CRITICAL_SAFE(&spinlock);
-}
-#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
-
#if (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED)
#if CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
#define BLE_SM_KEY_ERR 0x17
diff --git a/lib/bt/controller/esp32c2/dummy.c b/lib/bt/controller/esp32c2/dummy.c
new file mode 100644
index 00000000..0621f547
--- /dev/null
+++ b/lib/bt/controller/esp32c2/dummy.c
@@ -0,0 +1,320 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#include "esp_bt_cfg.h"
+
+#define BLE_ERR_UNKNOWN_HCI_CMD (0x01)
+/* LL Features */
+#define BLE_LL_FEAT_LE_ENCRYPTION (0x0000000001)
+#define BLE_LL_FEAT_CONN_PARM_REQ (0x0000000002)
+#define BLE_LL_FEAT_EXTENDED_REJ (0x0000000004)
+#define BLE_LL_FEAT_PERIPH_INIT (0x0000000008)
+#define BLE_LL_FEAT_LE_PING (0x0000000010)
+#define BLE_LL_FEAT_DATA_LEN_EXT (0x0000000020)
+#define BLE_LL_FEAT_LL_PRIVACY (0x0000000040)
+#define BLE_LL_FEAT_EXT_SCAN_FILT (0x0000000080)
+#define BLE_LL_FEAT_LE_2M_PHY (0x0000000100)
+#define BLE_LL_FEAT_STABLE_MOD_ID_TX (0x0000000200)
+#define BLE_LL_FEAT_STABLE_MOD_ID_RX (0x0000000400)
+#define BLE_LL_FEAT_LE_CODED_PHY (0x0000000800)
+#define BLE_LL_FEAT_EXT_ADV (0x0000001000)
+#define BLE_LL_FEAT_PERIODIC_ADV (0x0000002000)
+#define BLE_LL_FEAT_CSA2 (0x0000004000)
+#define BLE_LL_FEAT_LE_POWER_CLASS_1 (0x0000008000)
+#define BLE_LL_FEAT_MIN_USED_CHAN (0x0000010000)
+#define BLE_LL_FEAT_CTE_REQ (0x0000020000)
+#define BLE_LL_FEAT_CTE_RSP (0x0000040000)
+#define BLE_LL_FEAT_CTE_TX (0x0000080000)
+#define BLE_LL_FEAT_CTE_RX (0x0000100000)
+#define BLE_LL_FEAT_CTE_AOD (0x0000200000)
+#define BLE_LL_FEAT_CTE_AOA (0x0000400000)
+#define BLE_LL_FEAT_CTE_RECV (0x0000800000)
+#define BLE_LL_FEAT_SYNC_TRANS_SEND (0x0001000000)
+#define BLE_LL_FEAT_SYNC_TRANS_RECV (0x0002000000)
+#define BLE_LL_FEAT_SCA_UPDATE (0x0004000000)
+#define BLE_LL_FEAT_REM_PKEY (0x0008000000)
+#define BLE_LL_FEAT_CIS_CENTRAL (0x0010000000)
+#define BLE_LL_FEAT_CIS_PERIPH (0x0020000000)
+#define BLE_LL_FEAT_ISO_BROADCASTER (0x0040000000)
+#define BLE_LL_FEAT_SYNC_RECV (0x0080000000)
+#define BLE_LL_FEAT_CIS_HOST (0x0100000000)
+#define BLE_LL_FEAT_POWER_CTRL_REQ (0x0200000000)
+#define BLE_LL_FEAT_POWER_CHANGE_IND (0x0400000000)
+#define BLE_LL_FEAT_PATH_LOSS_MON (0x0800000000)
+#define BLE_LL_FEAT_PERIODIC_ADV_ADI (0x1000000000)
+#define BLE_LL_FEAT_CONN_SUBRATING (0x2000000000)
+#define BLE_LL_FEAT_CONN_SUBRATING_HOST (0x4000000000)
+#define BLE_LL_FEAT_CHANNEL_CLASS (0x8000000000)
+
+uint64_t ble_ll_supported_features;
+
+void
+ble_ll_supported_features_init(void)
+{
+ ble_ll_supported_features = BLE_LL_FEAT_EXTENDED_REJ;
+ ble_ll_supported_features |= BLE_LL_FEAT_DATA_LEN_EXT;
+
+#if DEFAULT_BT_LE_ROLE_CENTROL || DEFAULT_BT_LE_ROLE_PERIPHERAL
+ ble_ll_supported_features |= BLE_LL_FEAT_PERIPH_INIT;
+ ble_ll_supported_features |= BLE_LL_FEAT_CONN_PARM_REQ;
+#endif
+
+#if CONFIG_BT_LE_FEAT_LL_ENCRYPTION
+ ble_ll_supported_features |= BLE_LL_FEAT_LE_ENCRYPTION;
+#endif
+
+ ble_ll_supported_features |= (BLE_LL_FEAT_LL_PRIVACY | BLE_LL_FEAT_EXT_SCAN_FILT);
+ ble_ll_supported_features |= BLE_LL_FEAT_LE_PING;
+
+#if DEFAULT_BT_LE_EXT_ADV
+ ble_ll_supported_features |= BLE_LL_FEAT_EXT_ADV;
+#endif
+
+#if DEFAULT_BT_LE_PERIODIC_ADV
+ ble_ll_supported_features |= BLE_LL_FEAT_PERIODIC_ADV;
+ ble_ll_supported_features |= BLE_LL_FEAT_PERIODIC_ADV_ADI;
+#endif
+
+#if DEFAULT_BT_LE_PAST
+ ble_ll_supported_features |= BLE_LL_FEAT_SYNC_TRANS_RECV;
+ ble_ll_supported_features |= BLE_LL_FEAT_SYNC_TRANS_SEND;
+#endif
+
+#if DEGAULT_BT_LE_2M_PHY
+ ble_ll_supported_features |= BLE_LL_FEAT_LE_2M_PHY;
+#endif
+
+#if DEGAULT_BT_LE_CODED_PHY
+ ble_ll_supported_features |= BLE_LL_FEAT_LE_CODED_PHY;
+#endif
+
+#if DEFAULT_BT_LE_50_FEATURE_SUPPORT
+ ble_ll_supported_features |= BLE_LL_FEAT_CSA2;
+ ble_ll_supported_features |= BLE_LL_FEAT_SCA_UPDATE;
+ ble_ll_supported_features |= BLE_LL_FEAT_REM_PKEY;
+ ble_ll_supported_features |= BLE_LL_FEAT_CHANNEL_CLASS;
+#endif
+}
+
+#if !DEFAULT_BT_LE_ROLE_BROADCASTER
+void r_ble_ll_adv_rpa_timeout(void) { }
+void r_ble_lll_adv_halt(void) { }
+void r_ble_lll_adv_event_rmvd_from_sched(void) { }
+void r_ble_lll_adv_ext_event_rmvd_from_sched(void) { }
+int r_ble_ll_adv_enabled(void) { return 0; }
+int r_ble_ll_adv_can_chg_whitelist(void) { return 1; }
+int r_ble_ll_adv_set_random_addr(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+void r_ble_ll_adv_reset(void) { }
+void r_ble_ll_adv_init(void) { }
+void r_ble_ll_adv_deinit(void) { }
+int r_ble_ll_adv_env_init(void) { return 0; }
+void r_ble_ll_adv_env_deinit(void) { }
+int r_ble_lll_adv_rx_pkt_isr(void) { return -1; }
+void r_ble_ll_adv_rx_pkt_in(void) { }
+int r_ble_ll_adv_set_adv_params(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_adv_read_txpwr(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_hci_set_adv_data(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_hci_set_scan_rsp_data(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_hci_adv_set_enable(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_adv_vendor_hci_legacy_adv_clear(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_adv_set_data_related_addr_change(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+#endif // !DEFAULT_BT_LE_ROLE_BROADCASTER
+
+#if !DEFAULT_BT_LE_EXT_ADV
+bool r_ble_ll_adv_ext_check_data_itvl(void) { return true; }
+void r_ble_lll_adv_coex_dpc_update_on_aux_scheduled(void) { }
+void r_ble_lll_adv_coex_dpc_calc_pti_update_itvl(void) { }
+void r_ble_lll_adv_sec_done(void) { }
+int r_ble_lll_adv_sec_schedule_next_aux(void) { return 0; }
+void r_ble_lll_adv_sec_event_done(void) { }
+int r_ble_lll_adv_secondary_tx_start_cb(void) { return 0; }
+void r_ble_lll_adv_aux_schedule(void) { }
+void r_ble_lll_adv_update_rsp_offset(void) { }
+int r_ble_ll_adv_hci_set_random_addr(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_adv_ext_set_param(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_adv_ext_set_adv_data(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_adv_ext_set_scan_rsp(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_adv_ext_set_enable(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_adv_rd_max_adv_data_len(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_adv_rd_sup_adv_sets(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_adv_remove(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_adv_clear_all(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+#endif //!DEFAULT_BT_LE_EXT_ADV
+
+#if !DEFAULT_BT_LE_PERIODIC_ADV
+void r_ble_ll_adv_sm_stop_periodic(void) { }
+void r_ble_lll_adv_periodic_event_done(void) { }
+int r_ble_lll_adv_sync_tx_start_cb(void) { return 0; }
+void r_ble_lll_adv_sync_tx_end(void) { }
+int r_ble_lll_adv_periodic_start(void) { return 0; }
+void r_ble_lll_adv_periodic_rmvd_from_sched(void) { }
+int r_ble_ll_adv_periodic_set_param(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_adv_periodic_set_data(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_adv_periodic_enable(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+#endif //!DEFAULT_BT_LE_PERIODIC_ADV
+
+#if !DEFAULT_BT_LE_ROLE_OBSERVER
+void r_ble_lll_scan_halt(void) { }
+void r_ble_ll_scan_end_adv_evt(void) { }
+void r_ble_ll_scan_rx_pkt_in(void) { }
+int r_ble_lll_scan_rx_pkt_isr(void) { return -1; }
+int r_ble_ll_scan_env_init(void) { return 0; }
+void r_ble_ll_scan_env_deinit(void) { }
+void r_ble_ll_scan_init(void) { }
+void r_ble_ll_scan_deinit(void) { }
+void r_ble_ll_scan_reset(void) { }
+int r_ble_ll_scan_can_chg_whitelist(void) { return 1; }
+int r_ble_ll_scan_enabled(void) { return false; }
+int r_ble_lll_scan_chk_resume(void) { return -1; }
+int r_ble_ll_scan_set_scan_params(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_hci_scan_set_enable(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_scan_hci_update_adv_report_flow_ctrl(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_scan_hci_set_adv_report_flow_ctrl(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+#endif //!DEFAULT_BT_LE_ROLE_OBSERVER
+
+#if !DEFAULT_BT_LE_EXT_SCAN
+void r_ble_lll_scan_duration_period_timers_restart(void) { }
+void r_ble_lll_scan_duration_period_timers_stop(void) { }
+int r_ble_ll_hci_send_legacy_ext_adv_report(void) { return -1; }
+void r_ble_lll_sched_rmv_elem_type(void) { }
+void r_ble_ll_scan_send_truncated(void) { }
+void r_ble_ll_scan_aux_data_unref(void) { }
+void r_ble_lll_scan_sched_remove(void) { }
+void r_ble_lll_scan_aux_data_free(void) { }
+void r_ble_lll_aux_scan_drop(void) { }
+int r_ble_lll_sched_aux_scan(void) { return -1; }
+int r_ble_lll_scan_rx_isr_on_aux(void) { return -1; }
+void r_ble_lll_scan_period_timer_cb(void) { }
+void r_ble_lll_scan_duration_timer_cb(void) { }
+void r_ble_ll_scan_rx_pkt_in_on_aux(void) { }
+int r_ble_ll_set_ext_scan_params(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_hci_ext_scan_set_enable(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+#endif //!DEFAULT_BT_LE_EXT_SCAN
+
+#if !DEFAULT_BT_LE_ROLE_CENTROL
+void r_ble_ll_init_rx_pkt_in(void) { }
+int r_ble_lll_init_rx_pkt_isr(void) { return -1; }
+int r_ble_ll_conn_create(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_conn_create_cancel(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+#endif //!DEFAULT_BT_LE_ROLE_CENTROL
+
+#if !DEFAULT_BT_LE_ROLE_CENTROL || !DEFAULT_BT_LE_EXT_SCAN
+int r_ble_ll_ext_conn_create(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+#endif //!DEFAULT_BT_LE_ROLE_CENTROL || !DEFAULT_BT_LE_EXT_SCAN
+
+#if !DEFAULT_BT_LE_ROLE_PERIPHERAL
+int r_ble_ll_conn_slave_start(void) { return 0; }
+#endif //!DEFAULT_BT_LE_ROLE_PERIPHERAL
+
+#if !DEFAULT_BT_LE_ROLE_CENTROL && !DEFAULT_BT_LE_ROLE_PERIPHERAL
+void r_ble_ll_conn_rx_data_pdu(void) { }
+int r_ble_lll_conn_rx_pkt_isr(void) { return -1; }
+int r_ble_ll_hci_disconnect(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_conn_hci_rd_rem_ver_cmd(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_conn_hci_update(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_conn_hci_rd_chan_map(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_conn_hci_read_rem_features(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_conn_hci_param_rr(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_conn_hci_param_nrr(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+#endif //!DEFAULT_BT_LE_ROLE_CENTROL && !DEFAULT_BT_LE_ROLE_PERIPHERAL
+
+#if !CONFIG_BT_LE_FEAT_LL_ENCRYPTION
+int r_ble_ll_conn_chk_phy_upd_start(void) { return -1; }
+void r_ble_ll_hci_ev_encrypt_chg(void) { }
+int r_ble_ll_ctrl_enc_allowed_pdu_rx(void) { return 1; }
+int r_ble_ll_ctrl_enc_allowed_pdu_tx(void) { return 1; }
+uint8_t r_ble_ll_ctrl_rx_start_enc_rsp(void) { return 0x07; }
+uint8_t r_ble_ll_ctrl_rx_pause_enc_rsp(void) { return 0x07; }
+int r_ble_ll_hci_le_encrypt(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+#endif //!CONFIG_BT_LE_FEAT_LL_ENCRYPTION
+
+#if !DEFAULT_BT_LE_ROLE_PERIPHERAL || !CONFIG_BT_LE_FEAT_LL_ENCRYPTION
+uint8_t r_ble_ll_ctrl_rx_pause_enc_req(void) { return 0x07; }
+uint8_t r_ble_ll_ctrl_rx_enc_req(void) { return 0x07; }
+int r_ble_ll_conn_hci_le_ltk_reply(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_conn_hci_le_ltk_neg_reply(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+#endif //!DEFAULT_BT_LE_ROLE_PERIPHERAL || !CONFIG_BT_LE_FEAT_LL_ENCRYPTION
+
+#if !DEFAULT_BT_LE_ROLE_CENTROL || !CONFIG_BT_LE_FEAT_LL_ENCRYPTION
+uint8_t r_ble_ll_ctrl_rx_start_enc_req(void) { return 0x07; }
+void r_ble_ll_ctrl_rx_enc_rsp(void) { }
+void r_ble_ll_ctrl_enc_req_make(void) { }
+int r_ble_ll_conn_hci_le_start_encrypt(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+#endif //!DEFAULT_BT_LE_ROLE_CENTROL || !CONFIG_BT_LE_FEAT_LL_ENCRYPTION
+
+#if !DEGAULT_BT_LE_2M_PHY && !DEGAULT_BT_LE_CODED_PHY
+void r_ble_ll_ctrl_phy_update_proc_complete(void) { }
+void r_ble_ll_ctrl_phy_update_cancel(void) { }
+uint8_t r_ble_ll_ctrl_rx_phy_update_ind(void) { return 0x07; }
+uint8_t r_ble_ll_ctrl_rx_phy_rsp(void) { return 0x07; }
+uint8_t r_ble_ll_ctrl_rx_phy_req(void) { return 0x07; }
+void r_ble_ll_ctrl_phy_req_rsp_make(void) { }
+#endif //DEGAULT_BT_LE_2M_PHY && DEGAULT_BT_LE_CODED_PHY
+
+#if !DEFAULT_BT_LE_PERIODIC_SYNC
+void r_ble_lll_sync_halt(void) { }
+void r_ble_lll_sync_rmvd_from_sched(void) { }
+int r_ble_ll_sync_list_search(void) { return -1; }
+uint8_t r_ble_ll_ctrl_rx_periodic_sync_ind(void) { return 0x07; }
+void r_ble_ll_sync_rx_pkt_in(void) { }
+int r_ble_lll_sync_rx_pkt_isr(void) { return -1; }
+int r_ble_ll_sync_env_init(void) { return 0; }
+void r_ble_ll_sync_env_deinit(void) { }
+void r_ble_ll_sync_init(void) { }
+void r_ble_ll_sync_deinit(void) { }
+void r_ble_ll_sync_reset(void) { }
+bool r_ble_ll_sync_enabled(void) { return false; }
+int r_ble_ll_sync_create(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_sync_cancel(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_sync_terminate(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_sync_list_add(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_sync_list_remove(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_sync_list_clear(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_sync_list_size(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_sync_receive_enable(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+#endif //!DEFAULT_BT_LE_PERIODIC_SYNC
+
+#if !DEFAULT_BT_LE_PAST || !DEFAULT_BT_LE_PERIODIC_ADV
+int r_ble_ll_adv_periodic_set_info_transfer(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+#endif //!DEFAULT_BT_LE_PAST || !DEFAULT_BT_LE_PERIODIC_ADV
+
+#if !DEFAULT_BT_LE_PAST || !DEFAULT_BT_LE_PERIODIC_SYNC
+int r_ble_ll_sync_transfer(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_set_sync_transfer_params(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_set_default_sync_transfer_params(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+#endif //!DEFAULT_BT_LE_PAST || !DEFAULT_BT_LE_PERIODIC_SYNC
+
+#if !DEFAULT_BT_LE_50_FEATURE_SUPPORT
+uint8_t r_ble_ll_ctrl_rx_channel_reporting_ind(void) { return 0x07; }
+uint8_t r_ble_ll_ctrl_rx_channel_status_ind(void) { return 0x07; }
+uint8_t r_ble_ll_ctrl_rx_sca_req(void) { return 0x07; }
+uint8_t r_ble_ll_ctrl_rx_sca_rsp(void) { return 0x07; }
+void r_ble_ll_ctrl_channel_class_reporting_make(void) { }
+void r_ble_ll_ctrl_channel_class_enable_make(void) { }
+void r_ble_ll_ctrl_sca_req_rsp_make(void) { }
+int r_ble_ll_modify_sca(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_conn_req_peer_sca(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+#endif //!DEFAULT_BT_LE_50_FEATURE_SUPPORT
+
+#if !DEFAULT_BT_LE_50_FEATURE_SUPPORT
+int r_ble_ll_conn_hci_le_rd_phy(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_hci_le_set_def_phy(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_ll_conn_hci_le_set_phy(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+#endif //!DEFAULT_BT_LE_50_FEATURE_SUPPORT
+
+#if !CONFIG_BT_LE_DTM_ENABLED
+void r_ble_lll_dtm_rx_pkt_in(void) { }
+int r_ble_lll_dtm_rx_isr_end(void) { return -1; }
+void r_ble_lll_dtm_reset(void) { }
+void r_ble_lll_dtm_init(void) { }
+void r_ble_lll_dtm_deinit(void) { }
+int r_ble_lll_dtm_env_init(void) { return 0; }
+void r_ble_lll_dtm_env_deinit(void) { }
+int r_ble_lll_hci_dtm_tx_test(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_lll_hci_dtm_rx_test(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_lll_dtm_end_test(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_lll_hci_dtm_rx_test_v2(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+int r_ble_lll_hci_dtm_tx_test_v2(void) { return BLE_ERR_UNKNOWN_HCI_CMD; }
+#endif //!CONFIG_BT_LE_DTM_ENABLED
diff --git a/lib/bt/controller/esp32c2/esp_bt_cfg.h b/lib/bt/controller/esp32c2/esp_bt_cfg.h
index 0cb4168e..95a3c6b2 100644
--- a/lib/bt/controller/esp32c2/esp_bt_cfg.h
+++ b/lib/bt/controller/esp32c2/esp_bt_cfg.h
@@ -1,5 +1,5 @@
/*
- * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -28,7 +28,6 @@ extern "C" {
#else
#define BLE_LL_SCAN_PHY_NUMBER_N (1)
#endif
-
#define DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST MYNEWT_VAL(BLE_MAX_PERIODIC_ADVERTISER_LIST)
#define DEFAULT_BT_LE_MAX_PERIODIC_SYNCS MYNEWT_VAL(BLE_MAX_PERIODIC_SYNCS)
#define DEFAULT_BT_LE_MAX_CONNECTIONS MYNEWT_VAL(BLE_MAX_CONNECTIONS)
@@ -46,6 +45,14 @@ extern "C" {
#define DEFAULT_BT_LE_50_FEATURE_SUPPORT (0)
#endif
+ #define DEGAULT_BT_LE_2M_PHY (CONFIG_BT_NIMBLE_LL_CFG_FEAT_LE_2M_PHY)
+ #define DEGAULT_BT_LE_CODED_PHY (CONFIG_BT_NIMBLE_LL_CFG_FEAT_LE_CODED_PHY)
+ #define DEFAULT_BT_LE_EXT_ADV (CONFIG_BT_NIMBLE_EXT_ADV)
+ #define DEFAULT_BT_LE_PERIODIC_ADV (CONFIG_BT_NIMBLE_ENABLE_PERIODIC_ADV)
+ #define DEFAULT_BT_LE_EXT_SCAN (CONFIG_BT_NIMBLE_EXT_SCAN)
+ #define DEFAULT_BT_LE_PERIODIC_SYNC (CONFIG_BT_NIMBLE_ENABLE_PERIODIC_SYNC)
+ #define DEFAULT_BT_LE_PAST (CONFIG_BT_NIMBLE_PERIODIC_ADV_SYNC_TRANSFER)
+
#define DEFAULT_BT_LE_ROLE_OBSERVER MYNEWT_VAL(BLE_ROLE_OBSERVER)
#define DEFAULT_BT_LE_ROLE_CENTROL MYNEWT_VAL(BLE_ROLE_CENTRAL)
#define DEFAULT_BT_LE_ROLE_PERIPHERAL MYNEWT_VAL(BLE_ROLE_PERIPHERAL)
@@ -123,12 +130,55 @@ extern "C" {
#else
#define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT (8)
#endif
+
#if defined(CONFIG_BT_LE_50_FEATURE_SUPPORT)
#define DEFAULT_BT_LE_50_FEATURE_SUPPORT (1)
#else
#define DEFAULT_BT_LE_50_FEATURE_SUPPORT (0)
#endif
+ #if defined(CONFIG_BT_LE_LL_CFG_FEAT_LE_2M_PHY)
+ #define DEGAULT_BT_LE_2M_PHY (CONFIG_BT_LE_LL_CFG_FEAT_LE_2M_PHY)
+ #else
+ #define DEGAULT_BT_LE_2M_PHY (0)
+ #endif
+
+ #if defined(CONFIG_BT_LE_LL_CFG_FEAT_LE_CODED_PHY)
+ #define DEGAULT_BT_LE_CODED_PHY (CONFIG_BT_LE_LL_CFG_FEAT_LE_CODED_PHY)
+ #else
+ #define DEGAULT_BT_LE_CODED_PHY (0)
+ #endif
+
+ #if defined(CONFIG_BT_LE_EXT_ADV)
+ #define DEFAULT_BT_LE_EXT_ADV (CONFIG_BT_LE_EXT_ADV)
+ #else
+ #define DEFAULT_BT_LE_EXT_ADV (0)
+ #endif
+
+ #if defined(CONFIG_BT_LE_ENABLE_PERIODIC_ADV)
+ #define DEFAULT_BT_LE_PERIODIC_ADV (CONFIG_BT_LE_ENABLE_PERIODIC_ADV)
+ #else
+ #define DEFAULT_BT_LE_PERIODIC_ADV (0)
+ #endif
+
+ #if defined(CONFIG_BT_LE_EXT_SCAN)
+ #define DEFAULT_BT_LE_EXT_SCAN (CONFIG_BT_LE_EXT_SCAN)
+ #else
+ #define DEFAULT_BT_LE_EXT_SCAN (0)
+ #endif
+
+ #if defined(CONFIG_BT_LE_ENABLE_PERIODIC_SYNC)
+ #define DEFAULT_BT_LE_PERIODIC_SYNC (CONFIG_BT_LE_ENABLE_PERIODIC_SYNC)
+ #else
+ #define DEFAULT_BT_LE_PERIODIC_SYNC (0)
+ #endif
+
+ #if defined(BT_LE_PERIODIC_ADV_SYNC_TRANSFER)
+ #define DEFAULT_BT_LE_PAST (BT_LE_PERIODIC_ADV_SYNC_TRANSFER)
+ #else
+ #define DEFAULT_BT_LE_PAST (0)
+ #endif
+
#if defined(CONFIG_BT_LE_ROLE_CENTROL_ENABLE)
#define DEFAULT_BT_LE_ROLE_CENTROL (1)
#else
@@ -152,16 +202,68 @@ extern "C" {
#else
#define DEFAULT_BT_LE_ROLE_OBSERVER (0)
#endif
+ #if defined (CONFIG_BT_LE_HCI_UART_FLOWCTRL)
+ #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (CONFIG_BT_LE_HCI_UART_FLOWCTRL)
+ #if DEFAULT_BT_LE_HCI_UART_FLOW_CTRL
+ #define DEFAULT_BT_LE_HCI_UART_CTS_PIN (CONFIG_BT_LE_HCI_UART_CTS_PIN)
+ #define DEFAULT_BT_LE_HCI_UART_RTS_PIN (CONFIG_BT_LE_HCI_UART_RTS_PIN)
+ #else
+ #define DEFAULT_BT_LE_HCI_UART_CTS_PIN (-1)
+ #define DEFAULT_BT_LE_HCI_UART_RTS_PIN (-1)
+ #endif
+ #else
+ #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0)
+ #define DEFAULT_BT_LE_HCI_UART_CTS_PIN (-1)
+ #define DEFAULT_BT_LE_HCI_UART_RTS_PIN (-1)
+ #endif
#endif
#define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF
+#ifdef CONFIG_BT_LE_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS
+#define DEFAULT_BT_LE_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS (CONFIG_BT_LE_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS)
+#else
+#define DEFAULT_BT_LE_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS (0)
+#endif
+
+#ifdef CONFIG_BT_LE_CTRL_LLCP_CONN_UPDATE
+#define BT_CTRL_BLE_LLCP_CONN_UPDATE (1<<0)
+#else
+#define BT_CTRL_BLE_LLCP_CONN_UPDATE (0<<0)
+#endif
+
+#ifdef CONFIG_BT_LE_CTRL_LLCP_CHAN_MAP_UPDATE
+#define BT_CTRL_BLE_LLCP_CHAN_MAP_UPDATE (1<<1)
+#else
+#define BT_CTRL_BLE_LLCP_CHAN_MAP_UPDATE (0<<1)
+#endif
+
+#ifdef CONFIG_BT_LE_CTRL_LLCP_PHY_UPDATE
+#define BT_CTRL_BLE_LLCP_PHY_UPDATE (1<<2)
+#else
+#define BT_CTRL_BLE_LLCP_PHY_UPDATE (0<<2)
+#endif
+
+#define BT_LE_CTRL_LLCP_DISC_FLAG (BT_CTRL_BLE_LLCP_CONN_UPDATE | BT_CTRL_BLE_LLCP_CHAN_MAP_UPDATE | BT_CTRL_BLE_LLCP_PHY_UPDATE)
+
+#ifdef CONFIG_BT_CTRL_SCAN_BACKOFF_UPPERLIMITMAX
+#define BT_CTRL_SCAN_BACKOFF_UPPERLIMITMAX (CONFIG_BT_CTRL_SCAN_BACKOFF_UPPERLIMITMAX)
+#else
+#define BT_CTRL_SCAN_BACKOFF_UPPERLIMITMAX (256)
+#endif
+
#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
#define HCI_UART_EN CONFIG_BT_LE_HCI_INTERFACE_USE_UART
#else
#define HCI_UART_EN 0 // hci ram mode
#endif
+#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_RAM
+#define DEFAULT_BT_LE_VHCI_ENABLED (CONFIG_BT_LE_HCI_INTERFACE_USE_RAM)
+#else
+#define DEFAULT_BT_LE_VHCI_ENABLED (0)
+#endif
+
#ifdef CONFIG_BT_LE_SLEEP_ENABLE
#define NIMBLE_SLEEP_ENABLE CONFIG_BT_LE_SLEEP_ENABLE
#else
@@ -192,8 +294,6 @@ extern "C" {
#define DEFAULT_BT_LE_HCI_UART_DATA_BITS (UART_DATA_8_BITS)
#define DEFAULT_BT_LE_HCI_UART_STOP_BITS (UART_STOP_BITS_1)
#define DEFAULT_BT_LE_HCI_UART_PARITY (0)
- #define DEFAULT_BT_LE_HCI_UART_TASK_STACK_SIZE (CONFIG_BT_LE_HCI_UART_TASK_STACK_SIZE)
- #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0)
#else
#define DEFAULT_BT_LE_HCI_UART_TX_PIN (0)
#define DEFAULT_BT_LE_HCI_UART_RX_PIN (0)
@@ -202,8 +302,6 @@ extern "C" {
#define DEFAULT_BT_LE_HCI_UART_DATA_BITS (0)
#define DEFAULT_BT_LE_HCI_UART_STOP_BITS (0)
#define DEFAULT_BT_LE_HCI_UART_PARITY (0)
- #define DEFAULT_BT_LE_HCI_UART_TASK_STACK_SIZE (0)
- #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0)
#endif
/* Unchanged configuration */
@@ -232,7 +330,7 @@ extern "C" {
#define RTC_FREQ_N (32000) /* in Hz */
#endif // CONFIG_XTAL_FREQ_26
-#define BLE_LL_TX_PWR_DBM_N (9)
+#define BLE_LL_TX_PWR_DBM_N (CONFIG_BT_LE_DFT_TX_POWER_LEVEL_DBM_EFF)
#define RUN_BQB_TEST (0)